Evolutionary Test Program Induction for Microprocessor Design Verification
ATS2002: IEEE Asian Test Symposium, Guam (USA), November 2002, pp. 368-373
KEYWORDS:
ATPG,
Approximate Methods,
Evolutionary Algorithms,
Genetic Programming,
Micro-Processors,
MicroGP,
RT-Level,
Simulation-Based Approaches,
VHDL
ABSTRACT
Design verification is a crucial step in the design of any electronic device. Particularly when microprocessor cores are considered, devising appropriate test cases may be a difficult task. This paper presents a methodology able to automatically induce a test program for maximizing a given verification metric. The methodology is based on an evolutionary paradigm and exploits a syntactical description of microprocessor assembly language and an RT-level functional model. Experimental results show the effectiveness
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[CCSS02] F. Corno, G. Cumani, M. Sonza Reorda, G. Squillero, "Evolutionary Test Program Induction for Microprocessor Design Verification," ATS2002: IEEE Asian Test Symposium, Guam (USA), November 2002, pp. 368-373 |
