Papers on Evolutionary Algorithms and Verification

1. Artificial evolution in computer aided design: from the optimization of parameters to the creation of assembly programs
   G. Squillero
   Computing, Special Issue on Bio-inspired Computing, Volume 93, Numbers 2-4, 103-120
2. Automatic generation of software-based functional failing test for speed debug and on-silicon timing verification
   E. Sanchez, G. Squillero, A. Tonda
   MTV11: International Workshop on Microprocessor Test and Verification
3. Post-Silicon Failing-Test Generation through Evolutionary Computation
   E. Sanchez, G. Squillero, A. Tonda
   19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
4. Post-Silicon Functional Failing-Test Generation through Evolutionary Computation
   E. Sanchez, G. Squillero, A. Tonda
   ETS2005: IEEE European Test Symposium, 2005
5. Automatic Test Programs Generation Driven by Internal Performance Counters
   W. Lindsay , E. Sanchez, M. Sonza Reorda, G. Squillero
   MTV'04: 5th International Workshop on Microprocessor Test and Verification, pp. 8-13
6. GA-Based Verification of Network Protocols Performance
   M. Baldi, F. Corno, M. Rebaudengo, M. Sonza Reorda, G. Squillero
   [chapter in] Telecommunications Optimizations: Heuristic and Adaptive Techniques, edited by D. Corne and M. Oates, Wiley and Sons, August 2000, ISBN 0-471-98855-3, pp. 185-198
7. GA-based Performance Analysis of Network Protocols
   M. Baldi, F. Corno, M. Rebaudengo, G. Squillero
   ICTAI97: 9th IEEE International Conference on Tools with Artificial Intelligence, Newport Beach, CA (USA), November 1997, pp. 118-124
8. Simulation-Based Verification of Network Protocols Performance
   M. Baldi, F. Corno, M. Rebaudengo, P. Prinetto, M. Sonza Reorda, G. Squillero
   CHARME97: Advanced Research Working Conference on Correct Hardware Design and Verification Methods, Montr? al, Quebec, Canada, October 1997, pp. 236-251