Publications

  1. Fault Injection for Embedded Microprocessor-based Systems
    A. Benso, M. Rebaudengo, M. Sonza Reorda
    JOURNAL OF UNIVERSAL COMPUTER SCIENCE, 1999
    DOI: 10.3217/jucs-005-10-0693
    KEYWORDS: digital system design test and verification; dependability evaluation; fault injection; embedded microprocessor-based systems
    ABSTRACT: Microprocessor-based embedded systems are increasingly used to control safety-critical systems (e.g., air and railway traffic control, nuclear plant control, aircraft and car control). In this case, fault tolerance mechanisms are introduced at the hardware and software level. Debugging and verifying the correct design and implementation of these mechanisms ask for effective environments, and Fault Injection represents a viable solution for their implementation. In this paper we present a Fault Injection environment, named FlexFI, suitable to assess the correctness of the design and implementation of the hardware and software mechanisms existing in embedded microprocessor-based systems, and to compute the fault coverage they provide. The paper describes and analyzes different solutions for implementing the most critical modules, which differ in terms of cost, speed, and intrusiveness in the original system behavior

  2. SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information
    F. Corno, P. Prinetto, M. Sonza Reorda, M. Violante, U. Glaeser, H. Vierhaus
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1999
    DOI: 10.1109/43.743731

  3. EXFI: a low cost Fault Injection System for embedded Microprocessor-based Boards
    A. Benso, P. Prinetto, M. Rebaudengo, M. Sonza Rreorda
    ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 1998
    DOI: 10.1145/296333.296351
    KEYWORDS: performance analysis; digital system design test and verification; embedded microprocessor-based systems; software implemented fault injection; fault injection
    ABSTRACT: Evaluating the faulty behavior of low-cost embedded microprocessor-based boards is an increasingly important issue, due to their adoption in many safety critical systems. The architecture of a complete Fault Injection environment is proposed, integrating a module for generating a collapsed list of faults, and another for performing their injection and gathering the results. To address this issue, the paper describes a software-implemented Fault Injection approach based on the Trace Exception Mode available in most microprocessors. The authors describe EXFI, a prototypical system implementing the approach, and provide data about some sample benchmark applications. The main advantages of EXFI are the low cost, the good portability, and the high efficiency

  4. Integrating On-Line and Off-Line Testing of a Switching Memory in a Telecommunication System
    S. Barbagallo, F. Corno, D. Medina, P. Prinetto, M. Sonza Reorda
    IEEE DESIGN & TEST OF COMPUTERS, 1998

  5. Integrating Online and Offline Testing of a Switching Memory
    S. Barbagallo, F. Corno, D. Medina, P. Prinetto, M. Sonza Reorda
    IEEE DESIGN & TEST OF COMPUTERS, 1998
    DOI: 10.1109/54.655184

  6. The General Product Machine: a New Model for Symbolic FSM Traversal
    G. Cabodi, P. Camurati, F. Corno, P. Prinetto, M. Sonza Reorda
    FORMAL METHODS IN SYSTEM DESIGN, 1998
    ABSTRACT: FORMAL METHODS IN SYSTEM DESIGN, KLUWER

  7. Circular self-test path for FSMs
    F. Corno, P. Prinetto, M. Sonza Reorda
    IEEE DESIGN & TEST OF COMPUTERS, 1996
    DOI: 10.1109/54.544536

  8. GALLO: a Genetic Algorithm for Floorplan Area Optimization
    M. Rebaudengo, M. Sonza Reorda
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1996
    ABSTRACT: IEEE TRANSACTIONS ON COMPUTER AIDED DESIGN

  9. GATTO: A Genetic Algorithm for Automatic Test Pattern Generation for Large Synchronous Sequential Circuits
    F. Corno, P. Prinetto, M. Rebaudengo, M. Sonza Reorda
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1996
    DOI: 10.1109/43.511578
    ABSTRACT: IEEE TRANSACTIONS ON COMPUTER AIDED DESIGN

  10. Il ruolo delle tecniche di fault injection nell'analisi dell'affidabilità dei sistemi
    A. Benso, F. Corno, P. Prinetto, M. Rebaudengo, M. Sonza Reorda
    AEI AUTOMAZIONE ENERGIA INFORMAZIONE, 1996
    KEYWORDS: reliability; fault injection; digital system design test and verification
    ABSTRACT: Con il crescente utilizzo dei sistemi informatici in una sempre pi? vasta gamma di applicazioni, diventa di primaria importanza lo studio delle possibili conseguenze che pu?= provocare un malfunzionamento in uno di tali sistemi. In applicazioni critiche, quali il controllo del traffico aereo, di reattori nucleari, di sistemi di telecomunicazioni, di apparecchiature mediche, un guasto al sistema informatico pu?= costare la vita di persone o ingenti perdite economiche. I sistemi informatici impiegati in questo tipo di applicazioni sono solitamente progettati in modo da tollerare i guasti che possono causare gravi malfunzionamenti. Risulta allora necessario identificare metodologie di qualit? che permettano di accertare che un sistema critico per la sicurezza sia stato realizzato in modo corretto e che soddisfi i livelli di affidabilit? richiesti. Una valida soluzione al problema ? offerta dalla fault injection, ossia la deliberata iniezione di guasti all'interno di un sistema, allo scopo di analizzarne le reazioni. Nel primo capitolo di questo articolo viene affrontata l'analisi del problema dell'affidabilit? di un sistema (dependability) e viene descritto il contesto in cui si opera nell'analisi di sistemi "affidabili". Nel secondo capitolo vengono definiti i modelli di guasto e le differenze di tali modelli rispetto ad un approccio orientato al collaudo. Nel terzo capitolo sono descritte le principali tecniche di fault injection presentate in letteratura, evidenziando, per ognuna, l'idea di base, i pregi e i principali difetti

  11. Role of fault injection techniques in system dependability analysis
    A. Benso, F. Corno, P. Prinetto, M. Rebaudengo, M. Sonza Reorda
    AEI AUTOMAZIONE ENERGIA INFORMAZIONE, 1996

  12. Testable Synthesis of Control Units via Circular Self-Test Path: Problems and Solutions
    F. Corno, P. Prinetto, M. Sonza Reorda
    IEEE DESIGN & TEST OF COMPUTERS, 1996

  13. A Parallel System for Test Pattern Generation
    G. Balboni, G. Cabodi, S. Gai, M. Sonza Reorda
    PARALLEL COMPUTING, 1993

  14. An Approach to Sequential Circuit Diagnosis Based on Formal Verification Techniques
    G. Cabodi, P. Camurati, F. Corno, P. Prinetto, M. Sonza Reorda
    JOURNAL OF ELECTRONIC TESTING, 1993

  15. TPDL*: Extended Temporal Profile Description Language
    G. Cabodi, P. Camurati, P. Prinetto, M. Sonza Reorda
    SOFTWARE-PRACTICE & EXPERIENCE, 1991

  16. A Transputer-based gate-level fault simulator
    G. Cabodi, S. Gai, M. Sonza Reorda
    MICROPROCESSING AND MICROPROGRAMMING, 1990

  17. Expressing logical and temporal conditions in simulation environments: TPDL*
    G. Cabodi, P. Camurati, P. Prinetto, M. Sonza Reorda
    MICROPROCESSING AND MICROPROGRAMMING, 1989

  18. C_TPDL* : adapting TPDL* to concurrent simulation environments
    G. Cabodi, P. Camurati, P. Prinetto, M. Sonza Reorda
    MICROPROCESSING AND MICROPROGRAMMING, 1986