A Genetic Algorithm for the Computation of Initialization Sequences for Synchronous Sequential Circuits

Testing circuits which do not include a global reset signal requires either complex ATPG algorithms based on 9- or even 256-valued algebras, or some suitable method to generate initialization sequences. This paper faces the latter problem, and presents a new approach to the automated generation of an initialization sequence for synchronous sequential circuits. We propose a Genetic Algorithm providing a sequence that aims at initializing the highest number of flip flops with the lowest number of vectors. The experimental results we provide show that the approach is feasible to be applied even to the larger benchmark circuits and that it compares well to other known approaches in terms of initialized flip flops and sequence length. The paper also shows how the initialization sequences can be fruitfully exploited by simplifying the ATPG process.