System-Level Fault Modeling and Test Pattern Generation with Process Algebras

The increasing complexity of systems is challenging designers with new issues, such as description, validation, verification, and testing at system level. This paper advocates the use of Process Algebras as a mathematically sound formalism to describe, to validate, to verify, and to generate test patterns at system level. Its main contribution is twofold: on one hand the definition of a general-purpose fault model of faulty communications between fault-free, concurrently evolving processes, on the other hand the implementation of an automatic test pattern generation procedure, as a variant of the weak bisimulation algorithm, normally used to prove the observational equivalence of processes. Two examples are provided to support the claim for validity: the functional fault model proposed by S. M. Thatte and J. A. Abraham for microprocessors is expressed in the new framework and some functional faults on a bus structure are modeled. Experimental results concerning the Process Algebra description and the ATPG procedure are shown.