An Automatic Test Pattern Generator for Large Sequential Circuits based on Genetic Algorithms
ITC94: IEEE International Test Conference, Washington D. C. (USA), October 1994
KEYWORDS: ATPG,
Approximate Methods,
Evolutionary Algorithms,
Gate-Level,
Genetic Algorithms,
Simulation-Based Approaches
ABSTRACT
This paper is concerned with the question of automated test pattern generation for large synchronous sequential circuits and describes an approach based on Genetic Algorithms suitable for even the largest benchmark circuits, together with a prototype system named GATTO. Its effectiveness (in terms of result quality and CPU time requirements) for circuits previously unmanageable is illustrated. The flexibility of the new approach enables users to easily trade off fault coverage and CPU time to suit their needs.
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[PRSe94] P. Prinetto, M. Rebaudengo, M. Sonza Reorda, "An Automatic Test Pattern Generator for Large Sequential Circuits based on Genetic Algorithms," ITC94: IEEE International Test Conference, Washington D. C. (USA), October 1994