Papers on Logic Optimization
- Integrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization
E. San Millan, L. Entrena, J. A. Espejo, S. Chiusano, F. Corno
DATE99: IEEE Design, Automation & Test in Europe, Munich (Germany), March 1999 - Using BDDs to improve Structural Optimization for Sequential Logic Circuits
E. San Millan, L. Entrena, J. A. Espejo, S. Chiusano, F. Corno
DCIS98: XIII Design of Circuits and Integrated Systems Conference, Madrid (Spain), November 1998, pp. 284-289