CAD

Papers on Memory

  1. Cumulative Embedded Memory Failure Bitmap Display & Analysis
    N. Campanelli, T. Kerekes, P. Bernardi, M. de Carvalho, A. Panariti, M. Sonza Reorda, D. Appello, M. Barone
    IEEE Design and Diagnostic of Electronic Circuits and Systems, Vienna, April 2010, pp. 255-260
  2. A System-layer Infrastructure for SoC Diagnosis
    P. Bernardi, M. Grosso, M. Rebaudengo, M. Sonza Reorda
    JETTA: The Journal of Electronic Testing: Theory and Applications, Kluwer Academic Publishers
  3. Embedded Memories Diagnosis: An Industrial Workflow
    D. Appello, P. Bernardi, M. Grosso, M. Rebaudengo, M. Sonza Reorda, V. Tancorre
    ITC06: IEEE International Test Conference, 2006, Santa Clara (CA), USA
  4. Exploiting an Infrastructure IP to Reduce Memory Diagnosis Costs in SoCs
    P. Bernardi, M. Grosso, M. Rebaudengo, M. Sonza Reorda
    ETS 2005: IEEE European Test Symposium, 2005, pp. 202-207
  5. On the Diagnosis of SoCs including multiple Memory Cores
    P. Bernardi, M. Grosso, M. Rebaudengo, M. Sonza Reorda
    DDECS 2005: IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2005, pp. 75-80
  6. A programmable BIST approach for the diagnosis of embedded memory cores
    D. Appello, P. Bernardi, A. Fudoli, M. Rebaudengo, M. Sonza Reorda, V. Tancorre, M. Violante
    ETW03: 8th IEEE European Test Workshop (Formal Proceedings), The Netherlands, May 25-28, 2003, pp. 101-102
  7. Exploiting programmable BIST for the diagnosis of embedded memory cores
    D. Appello, P. Bernardi, A. Fudoli, M. Rebaudengo, M. Sonza Reorda, V. Tancorre, M. Violante
    ITC2003: IEEE International Test Conference, 2003, pp. 379-385
  8. A P1500 compatible microprocessor-based approach for the test of Embedded Flash Memories
    P. Bernardi, M. Rebaudengo, M. Sonza Reorda, M. Violante
    DATE2003: Design, Automation and Test in Europe, 2003, pp. 720-725