Papers on SIHFT

1. Hardware and Software Transparency in the Protection of Programs Against SEUs and SETs
   E. L. Rhod, C. A. Lang Lisb?a, L. Carro, M. Sonza Reorda, M. Violante
   JETTA: The Journal of Electronic Testing: Theory and Applications, Springer Netherlands, Volume 24, Numbers 1-3, June 2008, pp. 45 - 56
2. An optimized hybrid approach to provide fault detection and correction in SoCs
   L. Bolzani, P. Bernardi, M. Sonza Reorda
   SBCCI2007: IEEE 20th SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, 2007, pp. 342-347
3. A Hybrid Approach to Fault Detection and Correction in SoCs
   P. Bernardi, L. Bolzani, M. Sonza Reorda
   IOLTS2007: IEEE International On-Line Testing Symposium, 2007, pp. 107-112
4. Online hardening of programs against SEUs and SETs
   C.A.L. Lisboa, L. Carro, M. Sonza Reorda, M. Violante
   DFT2006, 21th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2006, pp. 280 - 290
5. Combined software and hardware techniques for the design of reliable IP processors
   M. Rebaudengo, L. Sterpone, M. Violante, C. Bolchini, A. Miele, D. Sciuto
   DFT2006, 21th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2006, pp. 265 - 273
6. Software-Implemented Hardware Fault Tolerance
   O. Goloubeva, M. Rebaudengo, M. Sonza Reorda, M. Violante
   Springer Science+Business Media, LLC, New York (USA), ISBN: 0-387-26060-9, pages 228
7. An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors
   P. Bernardi, L. Bolzani, M. Rebaudengo, M. Sonza Reorda, M. Violante
   DFT2005, 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, pp. 307-312