Papers on Software-Based Testing

1. A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs
   W. J. Perez, J. Velasco-Medina, D. Ravotto, E. Sanchez, M. Sonza Reorda
   14th IEEE International On-Line Testing Symposium, 2008, pp. 143-148
2. On Automatic Test Block Generation for Peripheral Testing in SoCs via Dynamic FSMs Extraction.
   D. Ravotto, E. Sanchez, M. Schillaci, M. Sonza Reorda, G. Squillero
   MTV2007: 8th International Workshop on Microprocessor Test and Verification, Austin, December 5-6, 2007, pp. 71 - 76
3. An Effective Approach for the Diagnosis of Transition-Delay Faults in SoCs, based on SBST and Scan Chains
   J. Lagos-Benites, D. Appello, P. Bernardi, M. Grosso, D. Ravotto, E. Sanchez, M. Sonza Reorda
   DFT2007, 22th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2007, pp. 291-299
4. On the Automatic Generation of Test Programs for Path-Delay Faults in Microprocessor Cores
   P. Bernardi, M. Grosso, E. Sanchez, M. Sonza Reorda
   ETS2007: 12th IEEE European Test Symposium, Freiburg, Germany, 2007, pp. 179 - 184
5. A Software-based Methodology for the Generation of Peripheral Test Sets Based on High-level Descriptions
   L. Bolzani, E. Sanchez, M. Sonza Reorda
   SBCCI2007: IEEE 20th SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, 2007, pp. 348-353
6. On Test Program Generation for Peripheral Components in a SoC Resorting to High-Level Metrics
   L. Bolzani, E. Sanchez, M. Sonza Reorda
   LATW2007: 8th IEEE Latin American Test Workshop, Cuzco, Peru, March 11-14, 2007
7. Hardware-Accelerated Path-Delay Fault Grading of Functional Test Programs for Processor-based Systems
   P. Bernardi, M. Grosso, M. Sonza Reorda
   GLSVLSI2007: 17th ACM Great Lake Symposium on VLSI, Stresa, Italy, March 11-13, 2007, pp. 411-416