TOSCA

Publication List

  • J. Perez, M. Sonza Reorda, M. Violante, “Dependability Analysis of CAN Networks: an emulation-based approach”, DFT2003: IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2003, pp 537-544
  • J. Perez, M. Sonza Reorda, M. Violante, “Accurate Dependability Analysis of CAN-based Networked Systems”, SBCCI2003:
  • R. Velazco, J. Mochnacs, P. Peronnard, O. Calvo, “Analysis of the criticity of transient bit-flip faults in a massive embedded application”, Proc. of LATW 2004, March 8-10 2004, Cartagena, Colombia, pp. 178-182
  • L. Bolzani, M. Rebaudengo, M. Sonza Reorda, F. Vargas, M. Violante, “An Infrastructure IP for Soft Error Detection”, Proc. of LATW 2004, March 8-10 2004, Cartagena, Colombia
  • E. Sanchez, M. Sonza Reorda, G. Squillero, R. Velazco, “Automatic Verification of RT-Level Microprocessor Cores Using Behavioral Specifications: a Case Study”, XIX Conference on Design of Circuits and Integrated Systems, Bordeaux, France, November 24-26, 2004
  • L. Anghel, E. Sanchez, M. Sonza Reorda, G. Squillero, R. Velazco, “Coupling Different Methodologies to Validate Obsolete Microprocessors”, DFT'04: The 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004, pp. 250-255
  • D. Barros Júnior, F. Vargas, M.B. Santos, I.C. Teixeira and J.P. Teixeira, “Modeling and Simulation of Time Domain Faults in Digital Systems”, Proc. IEEE International On-Line Test Symposium (IOLTS), pp. 5-10, July, 2004
  • M. Rodriguez-Irago, D. Barros Júnior, F. Vargas, M.B. Santos, I.C. Teixeira and J.P. Teixeira, “Modeling of Power Supply Transients for EMI Compliance in Digital Systems”, 10th. IEEE International Mixed-Signals Testing Workshop, Informal Digest, pp. 169-177, Portland, USA, June, 2004
  • D. Barros Júnior, M. Rodriguez-Irago, M.B. Santos, I.C. Teixeira, F. Vargas and J.P. Teixeira, “Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip”, Journal of Electronic Testing, Theory and Application (JETTA), vol.21, Kluwer Academic Publishers, August, 2005.
  • F. Corno, J. Perez, M. Sonza Reorda, M. Violante, “A multi-level approach to the dependability analysis of networked systems based on the CAN protocol”, SBCCI2004: 17th IEEE Symposium on Integrated Circuits and Systems Design, 2004, pp. 71-75
  • F. Corno, J. Perez, M. Ramasso, M. Sonza Reorda, M. Violante, “A multi-level approach to the dependability analysis of CAN networks for automotive applications”, International Conference on Integrated Chassis Control (ICC), Nov. 2004
  • F. Corno, J. Perez, M. Ramasso, M. Sonza Reorda, M. Violante, “Validation of the Dependability of CAN-Based Networked Systems”, IEEE High-level Design Validation and Test Workshop, 2004, pp. 161-164
  • L. Bolzani, M. Rebaudengo, M. Sonza Reorda, F. Vargas, M. Violante, “Hybrid Soft Error Detection by means of Infrastructure IP cores”, Proc. IEEE International On-Line Test Symposium (IOLTS), pp. 79-84, July, 2004
  • F. Corno, J. Perez, M. Ramasso, M. Sonza Reorda, M. Violante, “Dependability-oriented Validation of Automotive Systems”, DATE2005: Design, Automation and Test in Europe, Friday Meetings
  • P. Bernardi, L. Bolzani, M. Rebaudengo, M. Sonza Reorda, F. Vargas, M. Violante, “Pandora I-IP: an Hybrid Technique for Control-Flow Checking”, IEEE Latin American Test Workshop, 2005
  • P. Bernardi, L. Bolzani, M. Rebaudengo, M. Sonza Reorda, F. Vargas, M. Violante: “On-line Detection of Control-Flow Errors in SoCs by means of an Infrastructure IP core”, IEEE Dependable Systems and Networks Symposium, July 2005, pp. 50 -58
  • P. Bernardi, L. M. Veiras Bolzani, M. Rebaudengo, M. Sonza Reorda, F. L. Vargas, M. Violante: “A New Hybrid Fault Detection Technique for Systems-on-a-Chip”, IEEE Transactions on Computers, Vol. 55, No. 2, Feb. 2006, pp. 185-198
  • J. Perez, M. Sonza Reorda, M. Violante, “Early, Accurate Dependability Analysis of CAN-Based Networked Systems”, IEEE Design & Test of Computers, Vol. 23, No. 1, Jan/Feb. 2006, pp. 38-45
  • M. Rodriguez-Irago, J.J.R.Andina, F. Vargas, M.B. Santos, I.C. Teixeira, J.P. Teixeira, “Dynamic fault test and diagnosis in digital systems using multiple clock schemes and multi-VDD test”, IEEE On-line Testing Symposium, July 2005, pp. 281-286
  • Marcial Jesús Rodríguez Irago, Juan Rodriguez-Andina, Fabian Vargas, Isabel Teixeira, João Teixeira, “Using Multiple Clock Schemes and Multi-Temperature Test for Dynamic Fault Detection in Digital Systems”, IEEE Latin American Test Workshop, Buenos Aires, March 2006, pp. 103-107.
  • G.E. Sager, M. Alurralde, I. Prario, F. Palumbo, A. Filevich, A. Vertanessian, R. Velazco, P. Ferreyra, “TANDAR as a Digital Circuits Test Radiation Facility”, IEEE Latin American Test Workshop, Buenos Aires, March 2006
  • M. Alurralde, J. Durán, A. Filevich, C. Nigri, I. Prario, F. Palumbo, G.E. Sager, R. Velazco, A. Vertanessian, “A Radiation Damage Test Facility at Tandar”, IEEE Latin American Test Workshop, Buenos Aires, March 2006

Last modified on March 2, 2006 by Maurizio Rebaudengo