CV
My full name is Edgar Ernesto Sánchez Sánchez, and I was born in Bucaramanga-Colombia on 27th May 1974. Currently, I'm with Dipartimento di Automatica e Informatica of Politecnico di Torino as an assistant professor. From the beginning of my research activities within the Politecnico di Torino, I have continued working with the CAD group.
Sanchez publication list
Academic appointments
- In the fifth day of May 2000 I received my degree in Electronic Engineering (Título Universitario en Ingeniería Electrónica) from the Universidad Javeriana in Bogotá Colombia.
- In March 24th 2006 I received my Ph.D. degree in Computer Engineering from the Politecnico di Torino. My doctoral thesis is titled: Test techniques for advanced processors.
Research Activities
The research work developed that I have developed during these years mainly concerns with the development and evolution of manual and automatic methodologies for the generation of suitable stimuli for processor and peripheral cores validation, verification, testing and diagnosis. Additionally, the study and application of evolutionary techniques for problem optimization have been also addressed.The lines of investigation that I have followed in the recent years mainly focus on:
Evolutionary Algorithm (EA)
Several techniques aiming at reinforcing the EA have been analyzed, studied and proposed. Additionally, new architectural approaches have been also proposed and studied. An automatic approach (called µGP) for test-program generation based on the genetic programming paradigm was developed and improved.
Processor design verification, validation, testing and diagnosis
Manual and automated methodologies for the generation of test programs able to support the different phases of the processor design cycle have been proposed. The developed methodologies mainly exploit functional- and evolutionary-based approaches for the stimuli generation. Interesting results have been obtained on processors of increasing complexity: i8051, DLX, PLASMA, LEON, OpenRISC 1200, OpenSPARC T1, and T2, and Pentium®4.
Design validation of processor cores oriented to power consumption issues
Considering the architectural particularities of pipelined processor cores, power-hungry programs tackling design validation have been created. The processor core under consideration is the OpenRISC 1200.
Peripheral validation and testing
Communication peripherals, and system peripherals have been addressed by means of manual and functional-based approaches that exploit the high-level description of the device under consideration.
Drift correction on artificial sensing
Currently, electronic noses try to mimic human olfaction by using arrays of gas chemical sensors together with pattern recognition techniques, however, several problems have to be considered: in particular, the term “drift” is used to describe any gradual shift in sensor quantitative responses not originated by a change of the object being sensed. We developed an evolutionary-based methodology tackling the creation and development of techniques able to effectively correct drift in electronic noses.
Publication List
For a more detailed view of my publication list, please follow this ink:International Awards
It is also interesting to mention that the result of my research activities were considered of high interest bringing to my research group 2 international wards:- HUMMIES
- DATE06 Best Paper award
